1. Field of the Invention
The present invention relates to a semiconductor device and to a manufacturing method for the same, in particular, to a semiconductor device having a trench for isolation and to a manufacturing method for the same.
2. Description of the Background Art
A variety of isolation structures for electrically insolating elements from each other are utilized at the time when a plurality of predetermined elements, such as bipolar transistors, registers or capacitors, are mounted in a semiconductor integrated circuit (hereinafter referred to as IC). The isolation structure that is most widely utilized is an isolation structure based on a PN junction.
In this isolation structure a PN junction is formed between a region wherein elements are formed (element formation region) and an isolation region of which the conductive type is opposite to that of the element formation region. Then, adjoining element formation regions are electrically isolated from each other by applying a reverse bias to this PN junction.
In a bipolar IC, an Nxe2x88x92 type epitaxial layer is allowed to grow on a Pxe2x88x92 type semiconductor substrate. In this case, it is necessary to defuse a P type diffusion layer in the depth direction by the film thickness of the Nxe2x88x92 type epitaxial layer in order to form an isolation region. At this time, the P type diffusion layer spreads in the lateral direction to approximately the same degree as the film thickness of the Nxe2x88x92 type epitaxial layer.
Therefore, an extra distance between an element formation region and an isolation region must be secured by taking the amount of spread in the lateral direction of the above diffusion layer into consideration. In particular, since it is necessary to make the Nxe2x88x92 type epitaxial layer thick in a transistor of a high withstand voltage, the isolation region further spreads in the lateral direction so that the area of the semiconductor device that includes the element formation region and the isolation region becomes great.
In order to overcome this defect, a trench isolation structure has been implemented in recent years. In a trench isolation structure a deep trench is created to reach to a predetermined depth in the Pxe2x88x92 type semiconductor substrate by penetrating the Nxe2x88x92 type epitaxial layer and an insulator is filled in into this trench. Accordingly, a trench isolation structure does not have spread in the lateral direction, unlike in the case of an isolation structure based on a PN junction, and a trench isolation region is formed so as to approximately attain predetermined dimensions so that the density of integration of a semiconductor device can be greatly increased.
In the following, a manufacturing method for a bipolar IC of a trench isolation structure that has an NPN type bipolar transistor is described as a conventional manufacturing method for a semiconductor device.
First, as shown in FIG. 60, an N+ type buried layer 102 is formed on a P type silicon substrate 101. Next, an Nxe2x88x92 type epitaxial layer is formed in accordance with an epitaxial growth method. Trenches 106a and 106b are created by carrying out predetermined photomechanical, and other, processes so as to penetrate the Nxe2x88x92 type epitaxial layer and so as to reach to a predetermined depth in P type silicon substrate 101. Thereby, Nxe2x88x92 type epitaxial layer 103 is divided into three regions, Nxe2x88x92 type epitaxial layers 103a to 103c. 
Next, reaction products produced during etching at the time of the creation of trenches 106a and 106b are removed by carrying out predetermined wet etching or cleaning processes. After that, a thermal oxide film (not shown), which becomes a sacrificial oxide film, is formed on the surface of trenches 106a and 106b. 
Next, boron is implanted through this thermal oxide film at an acceleration voltage of 50 KeV with the dosage amount of 1xc3x971014/cm2 and, thereby, channel cut layers 108a and 108b are formed in regions of Pxe2x88x92 type silicon substrate 101 located at the bottom of trenches 106a and 106b. After that, the thermal oxide film is removed through wet etching and a thermal oxide film 109 is formed.
Next, as shown in FIG. 61, a polysilicon film 110 is formed on thermal oxide film 109 so as to fill in trenches 106a and 106b. Next, as shown in FIG. 62, buried polysilicon films 110a and 110b are formed by carrying out etching on the entire surface of polysilicon film 110 so as to leave polysilicon film 110 only within trenches 106a and 106b. 
Next, as shown in FIG. 63, thermal oxide film 109 is allowed to remain only within trenches 106a and 106b by carrying out wet etching so as to remove thermal oxide film 109 located on Nxe2x88x92 type epitaxial layers 103a to 103c. At this time, etching is also carried out on portions of thermal oxide film 109 located on the sidewalls in the vicinity of the edges of the openings of trenches 106a and 106b so that recesses 111a to 111d are created along the sidewalls in the vicinity of the edges of the openings of trenches 106a and 106b. 
Next, as shown in FIG. 64, a thermal oxide film 112 is formed on Nxe2x88x92 type epitaxial layers 103a to 103c by applying a thermal oxidation process. Through this thermal oxidation process, the exposed surface of buried polysilicon films 110a and 110b is also oxidized.
Accordingly, the surface of buried polysilicon films 110a and 110b and Nxe2x88x92 type epitaxial layers 103a to 103c, which are exposed in recesses 111a to 111d, is also oxidized in the upper portions of trenches 106a and 106b so that thick oxide films 109a and 109b are formed between buried polysilicon films 110a, 110b and Nxe2x88x92 type epitaxial layers 103a to 103c. Then, recesses 113a to 113d are created through the formation of thick oxide films 109a and 109b in thermal oxide film 112.
Next, as shown in FIG. 65, a collector lead-out layer 114 and a base lead-out layer 116 are, respectively, formed by means of a predetermined gas diffusion method. After that, thermal oxide film 112 is removed and a new thermal oxide film 118 is formed. At this time, in the case that etching of thermal oxide film 112 is carried out to an excessive degree, recesses 113a to 113d are spread so that thicker thermal oxide film is formed on the portions of these recesses 113a to 113d during thermal oxidation at the time of the formation of thermal oxide film 118.
Next, as shown in FIG. 66, a base diffusion layer 121 is formed by implanting boron ions, for example, into Nxe2x88x92 type epitaxial layer 103b by means of an ion implantation method. At this time, a thermal oxidation process is also carried out when boron is diffused by means of a thermal treatment (boron drive) and, thereby, the film thickness of thermal oxide film 118 becomes greater.
Next, as shown in FIG. 67, an emitter diffusion layer 124a and a collector diffusion layer 124b are formed on Nxe2x88x92 type epitaxial layer 103b. After that, metal silicide layers 127a to 127c, such as of TiSi2, barrier metal layers 128a to 128c, such as of TiN, and metal wires 129a to 129c, such as of AlCu, are, for example, formed. Thereby, an NPN transistor T is completed.
In the above-described conventional manufacturing method for a semiconductor device, however, it is found that the following problems exist. That is to say, when predetermined voltages are applied, respectively, between Nxe2x88x92 type epitaxial layer 103a and Nxe2x88x92 type epitaxial layer 103b or between epitaxial layer 103b and Nxe2x88x92 type epitaxial layer 103c, it is found that a comparatively large amount of leak current occurs with the result that the elements formed in the respective Nxe2x88x92 type epitaxial layers 103a to 103c can not be sufficiently electrically isolated from each other.
The present invention is provided to solve the above-described problems and one purpose thereof is to provide a semiconductor device wherein a leak current is prevented while another purpose thereof is to provide a manufacturing method for such a semiconductor device.
The inventors repeated experiments to search for the causes of the leak current and found that the leak current can be greatly reduced by preventing recesses 113a to 113d created in the sidewall portions in the vicinity of the edges of the openings of trenches 106a and 106b for isolation from becoming large and by preventing the film thickness of the thermal oxide film in those portions from becoming great.
Then, the inventors determined that the leak current is caused by local stress given to Nxe2x88x92 type epitaxial layers 113a to 113c due to comparatively thick silicon oxide films formed in recesses 113a to 113d located along the sidewalls in the vicinity of the edges of the openings of the trenches.
In the following, a semiconductor device according to the invention and the configuration of a manufacturing method for the same are described.
The semiconductor device according to one aspect of the present invention is provided with a semiconductor substrate of a first conductive type having a main surface, a layer of second conductive type, a trench portion, an insulating film and a buried semiconductor region. The layer of the second conductive type is formed on the main surface of the semiconductor substrate of the first conductive type. The trench portion is created so as to penetrate the layer of the second conductive type and to reach to a region of the semiconductor substrate and separates the layer of the second conductive type into one element formation region and another element formation region. The insulating film is formed on the sidewalls of the trench portion. The buried semiconductor region is formed on the insulating film so as to fill in the trench portion. Then, the insulating film, having an approximately uniform film thickness, is formed from the bottom of the trench portion over to the edges of the opening so as not to give any stress to the layer of the second conductive type.
Because of this structure, the insulating film, having an approximately uniform film thickness, formed on the sidewalls of the trench portion is formed from the bottom of the trench portion over to the edges of the opening so as not to give any stress to the layer of the second conductive type and, thereby, the layer of the second conductive type is prevented from being affected by stress. As a result, the leak current that occurs between one element formation region and another element formation region can be reduced so that the elements formed in the respective element formation regions can be electrically isolated.
A manufacturing method for a semiconductor device according to another aspect of the present invention is provided with the following steps. A layer of a second conductive type is formed on a main surface of a semiconductor substrate of a first conductive type. A trench portion is created so as to divide the layer of the second conductive type into one element formation region and another element formation region. A first insulating film is formed on the layer of the second conductive type that includes the sidewalls exposed within the trench portion. A semiconductor film is formed on the first insulating film so as to fill in the trench portion. A buried semiconductor region is formed so that the semiconductor film remains within the trench portion. A thermal treatment is carried out on the first insulating film that is located on the top surface of the layer of second conductive type and, thereby, a second insulating film that is thicker than the first insulating film is formed.
Because of this manufacturing method, a thermal treatment is carried out on the first insulating film that is formed on the layer of the second conductive type that includes the sidewalls exposed within the trench portion and, thereby, no recesses are formed along the sidewalls of the edges of the openings of the trench portion so that a portion of the first insulating film that is located in this portion can be prevented from becoming thicker through the thermal treatment in comparison with the conventional manufacturing method wherein the second insulating film is formed after removing the first insulating film that is located on the layer of the second conductive type. Thereby, an insulating film having an approximately uniform thickness is formed from the bottom of the trench portion over to the edges of the opening so that a stress is prevented from affecting the layer of the second conductive type. As a result, the leak current that occurs between one element formation region and another element formation region is reduced and, thereby, a semiconductor device is gained that can electrically isolate the elements that are formed in the respective element formation regions without fail.
Another manufacturing method for a semiconductor device according to another aspect of the present invention is provided with the following steps. A layer of a second conductive type is formed on a main surface of a semiconductor substrate of a first conductive type. A trench portion is created for dividing the layer of the second conductive type into one element formation region and another element formation region. An oxidation blocking film is formed on sidewalls exposed within the trench portion. A semiconductor film is formed on the oxidation blocking film so as to fill in the trench portion. A buried semiconductor region is formed so that the semiconductor film remains within the trench portion. An insulating film is formed on the layer of the second conductive type by carrying out a thermal treatment.
Because of this manufacturing method, an oxidation blocking film is formed on the sidewalls exposed within the trench portion and, thereby, the portion of the trench portion in the upper portion of the sidewalls is prevented from being oxidized at the time of the thermal treatment so that the layer of the second conductive type is prevented from being affected by stress. As a result, a semiconductor device is gained wherein the leak current that occurs between one element formation region and another element formation region can be reduced so that the elements formed in the respective element formation regions can be electrically isolated without fail.